Selective Topics in Micro-Architecture Design - Branch Prediction

Selective Topics in Micro-Architecture Design - Branch Prediction

The IEEE CTS ComSoc / SP Chapter invites you to a talk on Branch Prediction.

Date: 15th June 2009
Free Admission, Limited Seats, Register Now
Location: AT&T Labs, 9505 Arboretum Blvd, Austin, TX 78759
Click Here to Register

Talk Abstract:
Branch prediction has played a pivotal role as a micro-architecture design technology to improve modern microprocessor performance. In this talk, we will briefly dissect the components of a modern microprocessor and explain how branch prediction fits in. A historical perspective to the research and development of branch prediction will be presented. A number of predictor designs from both academia and industry will be discussed. We will investigate various design attributes like power, delay, global branch history, history update and multiple predictions. Finally, we will peek into the future of branch prediction.

Speaker Bio:
Dr. Lei Chen has more than 10 years experience in computer architecture research and development. He was a key member in the teams responsible for performance modeling and improvement for IBM Power7 and the System z microprocessors. His branch prediction design dramatically improved Power7 performance and power consumption. He has a number of publications and patents filed during his PhD studies and work at IBM. Dr. Chen received his PhD from the University of Rochester. He is currently open to career opportunities utilizing his expertise in computer engineering research and development.