Warp Processing -- Dynamic Transformation of Binaries to FPGA Circuits

Monday, July 13th, 5pm, ACES 2.402
http://www.cerc.utexas.edu/vlsi-seminar/

Presented by:
Frank Vahid, Professor, Dept. for Computer Science and Engineering
University of California, Riverside
http://www.cs.ucr.edu/~vahid
Assoc. Director, Center for Embedded Computer Systems, UC Irvine

Abstract:

In the amazing new world of billion-transistor chips, computers can achieve a form of self-improvement scarcely imagined before. Since 2002, UCR researchers have been developing a technology, known as "Warp Processing," in which the execution of critical program regions on a microprocessor is automatically replaced by execution on an FPGA, using a coprocessor circuit custom-designed on-the-fly for the program's specific needs, sometimes resulting in transparent performance improvement or "warping." That improvement isn't just 20% or 30%, but is sometimes 10x, 100x, or even 1000x. This talk will provide brief background on FPGAs (Field Programmable Gate Arrays) andon partitioning programs among microprocessors and FPGAs, present the basics of warp processing ("dynamic" partitioning), applications, highlight results showing large speedups even compared to a hypothetical 32-core machine, and discuss discuss other concepts related to standard binaries and just-in-time compilation for FPGAs.