Hardware Engineer's Technical Meeting

Dec 17 2009 10:00 am
Dec 17 2009 12:00 pm

The Agenda for the meeting is below. I am inviting all interested Engineers to join for this study group.

Agenda :
- Latches and Flop Designs
- Low Power Physical Implementation
- Dynamic Circuit Designs

Venue :
DBM
9600 Great Hills Trail, Suite 130E
Austin, TX 78759
10AM - Noon

Comments

shahnaz's picture

Updated Agenda Speaker 1.

Submitted by shahnaz on Wed, Dec 16 2009 - 10:54 AM.

Updated Agenda

Speaker 1. Sam Towers -- Latches & Flop Designs
Speaker 2. Surrendra Bhattarai -- Clock Tree Insertion
Speaker 3. Shahnaz Nagle -- Dynamic Circuit Design