Hardware Engineer's Technical Meeting

Submitted by shahnaz on Fri, 01/15/2010 - 3:24pm.
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02/03/2010 - 1:00pm
02/03/2010 - 3:00pm

The Agenda for the meeting is below. All interested Engineers are welcome to join. This is a free event.

Agenda :
Speaker 1: Surendra Bhattarai
'Low Power Design'

Speaker 2: Robert Renteria
'Verification Flow for Digital Design'

Venue :
DBM
9600 Great Hills Trail, Suite 130E
Austin, TX 78759