Monthly Technical Seminar of IEEE CTS Solid-State Circuits / Circuits and Systems Joint Chapter

Designing Multi-Processor and Multi-Core Systems-on-Chip

Prof. Andreas Gerstlauer
University of Texas at Austin

Location: ENS (Engineering and Science Building) 306A on UT Campus

http://maps.google.com/maps/ms?hl=en&ie=UTF8&msa=0&msid=1088379744524717...

Refreshments: Cookies, soft drink

Cost: none

Abstract: The continuous increase in size, complexity, and heterogeneity of embedded system design has introduced new challenges in their modeling and implementation. Multi-Processor System-on-Chip (MPSoC) design requires high speed models for early verification and performance evaluation. As a result, electronic system level (ESL) modeling has moved up in abstraction from cycle accurate RTL to timed and untimed transaction-level models (TLMs). However, the open question is how to get from a high level system description to a hardware/software implementation? The goal of this tutorial is to answer such questions and to provide system designers and managers with new insight into ESL modeling concepts and synthesis techniques for MPSoCs.

In this tutorial, we will cover the key concepts and state of the art tools for MPSoC design. We will discuss TLM semantics for automatic model generation, methods for automatic design space exploration, and hardware/software synthesis. This tutorial is targeted towards embedded software and hardware developers, engineers who use or are interested in using ESL design tools, managers of system designers, and verification engineers.

Biography: Andreas Gerstlauer received a Dipl.-Ing. degree in Eletrical Engineering from the University of Stuttgart , Germany in 1997 and M.S. and Ph.D. degrees in Information and Computer Science from the University of California, Irvine (UCI) in 1998 and 2004, respectively. Prior to joining UT Austin in 2008, he was an Assistant Researcher in the Center for Embedded Computer Systems (CECS) at UC Irvine, leading a research group to develop electronic system-level (ESL) design tools. Commercial derivatives of such tools are in use at the Japanese Aerospace Exploration Agency (JAXA) and NEC Toshiba Space Systems among others.

Dr. Gerstlauer is co-author on 3 books and more than 30 conference and journal publications, and his paper on OS modeling was reprinted as one of the most influential contributions at DATE. He has presented in numerous conference and industrial tutorials, and serves on the program committee of major conferences such as DATE and CODES+ISSS. Dr. Gerstlauer's research interests include system-level design automation, system modeling, design languages and methodologies, and embedded hardware and software synthesis.