Multiprocessor Architectures for Speculative Multithreading
Event: Computer Architecture Seminar Series
http://www.cs.utexas.edu/users/cart/arch
Speaker: Josep Torrellas
University of Illinois, Urbana-Champaign
Title: "Multiprocessor Architectures for Speculative Multithreading"
Date: Monday, April 7, 2008
Time: 3:30 pm
Place: ACES 2.402
Host: Doug Burger
ABSTRACT:
One of the biggest challenges facing computer architecture
today is the design of parallel architectures that make it
easy for programmers to write parallel codes. One of the
architectural technologies that is showing great versatility
and potential in this direction is Speculative Multithreading.
In this talk, I will discuss the many uses of this technology
in multiprocessors, and its remarkable potential for
performance and programmability (Thread-Level Speculation,
Speculative Synchronization, Transactional Memory, and BulkSC),
hardware reliability (Paceline), and software dependability
(ReEnact and Iwatcher).
