Physical Design and Integration of SOC, CPU & ASIC

Clocking
flows
LEC
Noise
Place & Route tools
power
Synthesis
Synthesis & Timing
Timing

Background information

10 years of extensive experience in working with start-ups and cross-functional design teams to deliver leading-edge SOCs, ASICs, CPUs. Rich hands-on experience in Synthesis, Timing, Clocking, Power, Noise, LEC, Place & Route tools, flows with a proven record of efficient execution and dedication. PhD in Electrical and Computer Engineering from Carnegie Mellon University.

Education

Ph.D. or equivalent

Availability

Full-time (day)

Capacity

Employee

Consultant / Contractor

Please contact the skill set owner if you have an imminent employment opportunity, or one currently available to discuss. Thank you.