Experienced Senior Engineering Technician
Background information
Effective and enthusiastic senior technician with 13 years experience in the semiconductor industry with two major companies (AMD and Freescale). Experience includes development of MOSFET transistors and microprocessors and transistor reliability testing. Proven record of engineering accomplishments in ownership of products, problems, and projects, as well as interaction on a multinational scale, including foundry fabs. Team backbone with demonstrated communication skills and a knack for streamlining procedures and introducing time-saving methods. Familiarity with Perl, XML, Visual Basic, and C-based proprietary scripting languages.
Advanced Micro Devices (AMD) Austin, TX 04/06 - 06/08
SENIOR TECHNOLOGIST, PROCESS TECHNOLOGY INTEGRATION PRODUCT DEVELOPMENT ENGINEERING
* Tested and analyzed CPUs at the package level, including multicore CPU designs, both K8 and next generation families. Interpreted the data and issued reports comparing parametric and functional performance of products in relation to each other, to determine manufacturability of select process changes.
* Analyzed various CPU circuit blocks (PLL, IO, thermal diode, fuse block, cache, and logic core). Used analysis to detect potential design or process problems.
* Attained proficiency with Credence Sapphire test platform. Composed, validated, and maintained test programs. Fixed testing problems. Collaborated with cross-functional teams on future program development standards.
Freescale Semiconductor (formerly Motorola) Austin, TX 01/95 - 04/06
SENIOR DEVICE TECHNICIAN, CMOS PLATFORMS RELIABILITY (07/01 - 04/06)
* Created and implemented a system for wafer-level TDDB, HCI, and NBTI studies, where there was none before, for technology certification and process development. Wafer-level testing reduced experiment time from weeks to days. Credited with co-authorship on several papers based on these studies. Performed some of the data analysis to offload the engineers. Facilitated other CMOS Platforms groups' setup of similar testing methodology.
* Coordinated complicated scheduling across multiple test systems and platforms to meet ever-changing priorities and deadlines. Secured temporary capacity to work through excess load to meet critical deadlines.
* Devised and maintained scripts to analyze data collected into Freescale proprietary databases, which reduced analysis time from days to minutes. Created scripts for automated generation of test plans, which saved hours per experiment.
* Participated in the development of multiple Parallel Probe Reliability (PPR) testers, including control computer assembly, correlation studies, software debug, and waveform analysis. Directed efforts of separate vendors for these testers. Conserved 50% of test controller budget by finding alternate supply paths for components.
* Proficient with Electroglas 4085, 4090, and 5|300 probers and Tesla PPR software.
DEVICE ENGINEERING TECHNICIAN, MOS3 AND MOS8 (11/97 - 07/01)
* Maintained ownership of various 68HC05 microcontroller products, including one that occupied the majority of production capacity for a period of weeks. Diagnosed performance and yield issues. Operated at better than 93% die yield.
* Handled device disposition responsibility for combined MOS2 and MOS3 (run rate > 20,000 starts per week; the most productive wafer fab in the world at the time) on second shift for more than a year. Kept production flowing while device owners went home for the day or went on vacation.
* Facilitated crisis-mode data collection and interpretation for disposition of major customer return and scrap incidents. Presented data to and participated in cross-functional crisis management teams. Consulted with overseas customers and outside vendors for trouble resolution. Received Motorola's On the Spot award for these efforts.
* Composed the MOS3 manual for hand-testing parametrics, which was then used as a benchmark for the MOS8 and MOS13 manuals. Trained technicians, engineers, and managers on parametric testing.
EDUCATION
The University of Texas at Austin Austin, TX 1990 - 1996
* Completed approximately 75 hours toward BSEE while working 40 or more hours per week.
Education
Availability
Capacity
Please contact the skill set owner if you have an imminent employment opportunity, or one currently available to discuss. Thank you.
