3D Integration for High-Performance Processor Microarchitectures

Submitted by matt on Fri, 09/26/2008 - 8:12am.
::
09/29/2008 - 3:00pm
09/29/2008 - 4:30pm

Speaker/Affiliation: Gabriel Loh/Georgia Institute of Technology

Date/Time: Monday, September 29, 2008 @ 3:00 p.m.

Location: ACES 2.402 (UT-Austin)

Host: Steve Keckler

Talk Title:
"3D Integration for High-Performance Processor Microarchitectures"

Talk Abstract:

Three-dimensional integration is a new fabrication technology that allows stacking multiple layers of silicon into a single, tightly integrated system. The advantages include greater device density, drastic reduction in
wiring due to the flexibility of 3D placement and routing, and the potential for integration of heterogeneous technologies. In this talk, I will present some of the 3D microarchitecture work happening at Georgia Tech, which includes several applications of 3D at different levels of granularity: at the circuit level, functional unit block level, and at the system level.