Design / Functional Verification
Sr. Design and Verification Engineer
Background information
10 years ASIC design and Verification
15 years FPGA design and Verification
15 years PCB design and Verification
Availability
Full-time (day)
Part-time (day)
Capacity
Employee
Consultant / Contractor
Verification Engineer or Verification AE
Background information
DON TICARICH
2008 Dayflower Trace
Cedar Park, TX 78613
Email: dticarich@sbcglobal.net
Cell: 321-432-1535
Home: 512-250-1294
Career Objective
Availability
Full-time (day)
Capacity
Employee
Consultant / Contractor
Senior Embedded Systems Developer
Background information
· Developed and wrote the firmware for a deplacement RFID (Radio Frequency Identification) tag for the California FasTrak system using a low-cost microprocessor after receiving only minimal requireme
Availability
Full-time (day)
Part-time (day)
Capacity
Consultant / Contractor
Design
Background information
Availability
Full-time (day)
Part-time (day)
Capacity
Employee
Consultant / Contractor
ASIC designer
Background information
PROFESSIONAL EXPERIENCE
2006 - 2007
IBM - Austin, TX
Electronic Design Automation (EDA) Engineer
Availability
Full-time (day)
Capacity
Employee
Consultant / Contractor
Electronic Applications Engineer
- Analog / RF / Circuit Design
- Design / Functional Verification
- Device Engineering
- Failure Analysis
- Industrial
- Layout / Floorplanning
- Library Design / Device Characterization
- Process / Process Development
- Product / Test Engineering
- Reliability & Quality
- Support
- Synthesis & Timing
- Wafer Test / Probe
- Analog
- C++
- Cadence Virtuoso
- Digital
- Matlab
- Protel99SE
- RF and mixed signal
- Semiconductor devices
- SystemC
Background information
+ Strong knowledge of smith chart, transmission line, mixer, oscillator, PLL design and test measurements using ADS and ASITIC.
Availability
Full-time (day)
Part-time (day)
Evenings
Weekends
Capacity
Employee
Consultant / Contractor