C++
Electronic Applications Engineer
- Analog / RF / Circuit Design
- Design / Functional Verification
- Device Engineering
- Failure Analysis
- Industrial
- Layout / Floorplanning
- Library Design / Device Characterization
- Process / Process Development
- Product / Test Engineering
- Reliability & Quality
- Support
- Synthesis & Timing
- Wafer Test / Probe
- Analog
- C++
- Cadence Virtuoso
- Digital
- Matlab
- Protel99SE
- RF and mixed signal
- Semiconductor devices
- SystemC
Background information
+ Strong knowledge of smith chart, transmission line, mixer, oscillator, PLL design and test measurements using ADS and ASITIC.
Availability
Capacity
Software Developer
Background information
WORK EXPERIENCE
Dell Incorporated - Round Rock, TX, April 2007-Present
Role: Software Developer Lead
Availability
Capacity
Web Developer
Background information
I obtained a BSIT degree in 2006. I haven't created any web sites since I was in school. Looking to gain the skills needed to enter into the web develper field.
Availability
Capacity
Project Managment/Technical Consultant/Systems Engineering
Background information
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MADIA WILDER
15450 FM 1325 # 1436, Austin, TX 78728
Availability
Capacity
Enterprise software architect; team leader; visionary strategist
Background information
25 years experience in enterprise software engineering, consulting, architecture, team leading, and mentoring, in large and small companies. Founded 7 startup companies.
Availability
Capacity
Information Technology
Background information
http://people.rit.edu/nbh7529/index.html
Projects:
• Coder for a UNIX tutorial website, including a JavaScript UNIX environment emulator. Created
Availability
Capacity
Hardware Engineer/ CPU Architecture Designer
Background information
I am a PhD student and will be graduating this May 2008. I have interest as a hardware engineer. My academic research has focus on advance hardware algorithms for searching.
Availability
Capacity
SoC Design Verification at system level. Verification management, planning, resource evaluation. Verification tools development.
Background information
Freescale Semiconductor, Austin, Texas
PowerQuick III SoC Design Verification Manager, 2007 to present
Team Lead, and system level verification and testbench expert, 2001-2007.
Availability
Capacity
Business Development Expertise, incl. Non-Profits
Background information
My name is Mark O'Brien and I have 25 years of High Tech Business Development expertise with firms in Silicon Valley, Boston, and Austin.
Availability
Capacity
Software Engineering
Background information
Expert level software engineer and technical guru who is relied upon to solve the most complex software problems throughout the Product Development process.