Synthesis & Timing
Sr. Design and Verification Engineer
Background information
10 years ASIC design and Verification
15 years FPGA design and Verification
15 years PCB design and Verification
Availability
Full-time (day)
Part-time (day)
Capacity
Employee
Consultant / Contractor
ASIC designer
Background information
PROFESSIONAL EXPERIENCE
2006 - 2007
IBM - Austin, TX
Electronic Design Automation (EDA) Engineer
Availability
Full-time (day)
Capacity
Employee
Consultant / Contractor
Electronic Applications Engineer
- Analog / RF / Circuit Design
- Design / Functional Verification
- Device Engineering
- Failure Analysis
- Industrial
- Layout / Floorplanning
- Library Design / Device Characterization
- Process / Process Development
- Product / Test Engineering
- Reliability & Quality
- Support
- Synthesis & Timing
- Wafer Test / Probe
- Analog
- C++
- Cadence Virtuoso
- Digital
- Matlab
- Protel99SE
- RF and mixed signal
- Semiconductor devices
- SystemC
Background information
+ Strong knowledge of smith chart, transmission line, mixer, oscillator, PLL design and test measurements using ADS and ASITIC.
Availability
Full-time (day)
Part-time (day)
Evenings
Weekends
Capacity
Employee
Consultant / Contractor
Mixed Signal Designer
- Analog / RF / Circuit Design
- Design / Functional Verification
- Device Engineering
- Hardware Engineering
- Library Design / Device Characterization
- Logic Design
- Process / Process Development
- Semiconductors / Fabrication
- Synthesis & Timing
- Analog Design
- ASIC Design
- Clock Tree/Bus Modeling.
- CMOS Custom Circuit Design
- CMOS Low Power Designs and Methodologies
- Device Physics
- IO
- IR Drop Analysis
- NanoSim/UltraSim
- ROM/SRAM
- Transistor Fundamentals
Background information
Sanjay Patil
11004 Pebble Garden Ln., Austin, TX 78739
Cell: (512) 731-2781/573-1063
sanjay_97@yahoo.com
OBJECTIVE
Seeking Mixed Signal IC Design Position Focused On Low Power.
Availability
Full-time (day)
Capacity
Employee
Digital Logic RTL Design Engineer
Background information
Availability
Full-time (day)
Capacity
Employee
Comprehensive Computer Engineer
- Analog / RF / Circuit Design
- Application Architect
- Applications / Field
- Architecture / ESL / Modeling
- Assembly / Packaging
- Board Design
- Business
- Communications
- Design / Functional Verification
- Device Engineering
- DSP / Algorithms
- Embedded Software Developer
- Failure Analysis
- Hardware Engineering
- IT / Infrastructure
- Layout / Floorplanning
- Logic Design
- Marketing
- Network / Web Applications
- Operations
- Product / Test Engineering
- Project Management
- Reliability & Quality
- Semiconductors / Fabrication
- Software Engineering
- Software Engineering / Programmer
- Support
- Support
- Synthesis & Timing
- Systems Engineer
- Tools / EDA Development
- Training / Consulting
- Training / Consulting
- Training / Consulting
- Validation / Lab / Debug
- Other
- Other
- Other
- Other
- Altera
- architecture
- C
- C++
- Cadence
- consumer
- CPLD
- CUPL
- DMEE
- fabless
- games
- HDL
- IC
- Lattice
- layout
- Mentor
- OOP
- Orcad
- PADS
- PCB
- PLD
- PowerPCB
- Protel
- schematic
- UML
- ViewDraw
- ViewLogic
- WWW
- XML
Background information
comprehensive computer engineering services specializing in consumer products; see résumé at http://www.syncopate.us/resumes/carlsenj
Availability
Full-time (day)
Part-time (day)
Evenings
Weekends
Capacity
Executive / Board
Employee
Consultant / Contractor