Tools / EDA Development
Verification Engineer or Verification AE
Background information
DON TICARICH
2008 Dayflower Trace
Cedar Park, TX 78613
Email: dticarich@sbcglobal.net
Cell: 321-432-1535
Home: 512-250-1294
Career Objective
Availability
Capacity
ASIC designer
Background information
PROFESSIONAL EXPERIENCE
2006 - 2007
IBM - Austin, TX
Electronic Design Automation (EDA) Engineer
Availability
Capacity
EDA/CAD Engineering Management & Development Professional
- Application Architect
- Design / Functional Verification
- Layout / Floorplanning
- Library Design / Device Characterization
- Project Management
- Software Engineering
- Software Engineering / Programmer
- Tools / EDA Development
- application/tool s/w development
- ASIC
- C/C++
- CAD
- design flow architecture
- EDA
- methodology flow development
- s/w project management
- SOC
Background information
PROFILE
Availability
Capacity
Hardware Engineer/ CPU Architecture Designer
Background information
I am a PhD student and will be graduating this May 2008. I have interest as a hardware engineer. My academic research has focus on advance hardware algorithms for searching.
Availability
Capacity
power estimation and energy profiling of DSP processors
- Applications / Field
- Architecture / ESL / Modeling
- Design / Functional Verification
- DSP / Algorithms
- Embedded Software Developer
- Failure Analysis
- Hardware Engineering
- Logic Design
- Semiconductors / Fabrication
- Systems Engineer
- Tools / EDA Development
- Validation / Lab / Debug
- architecture
- benchmarking
- C
- DSP
- energy
- energy estimation
- model validation
- modeling
- Perl
- power
- power estimation
Background information
Freescale Semiconductors, India (May 2005 – August 2007)
Development of a power estimation tool and an energy profiler for StarCore VLIW DSP
Availability
Capacity
Modeling and Performance Analysis of Computer Architecture
- Architecture / ESL / Modeling
- Design / Functional Verification
- DSP / Algorithms
- Embedded Software Developer
- Hardware Engineering
- Semiconductors / Fabrication
- Systems Engineer
- Tools / EDA Development
- benchmarking
- compiler flag mining
- cycle accurate simulators
- EEMBC
- modeling
- performance analysis
- SPEC
- trace-driven simulator
Background information
Freescale Semiconductors (May 2005 – August 2007)
Performance Analysis of PowerPC Processors
Availability
Capacity
Comprehensive Computer Engineer
- Analog / RF / Circuit Design
- Application Architect
- Applications / Field
- Architecture / ESL / Modeling
- Assembly / Packaging
- Board Design
- Business
- Communications
- Design / Functional Verification
- Device Engineering
- DSP / Algorithms
- Embedded Software Developer
- Failure Analysis
- Hardware Engineering
- IT / Infrastructure
- Layout / Floorplanning
- Logic Design
- Marketing
- Network / Web Applications
- Operations
- Product / Test Engineering
- Project Management
- Reliability & Quality
- Semiconductors / Fabrication
- Software Engineering
- Software Engineering / Programmer
- Support
- Support
- Synthesis & Timing
- Systems Engineer
- Tools / EDA Development
- Training / Consulting
- Training / Consulting
- Training / Consulting
- Validation / Lab / Debug
- Other
- Other
- Other
- Other
- Altera
- architecture
- C
- C++
- Cadence
- consumer
- CPLD
- CUPL
- DMEE
- fabless
- games
- HDL
- IC
- Lattice
- layout
- Mentor
- OOP
- Orcad
- PADS
- PCB
- PLD
- PowerPCB
- Protel
- schematic
- UML
- ViewDraw
- ViewLogic
- WWW
- XML
Background information
comprehensive computer engineering services specializing in consumer products; see résumé at http://www.syncopate.us/resumes/carlsenj