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IP
Sr. RTL design engineer
Submitted by ahughes on Wed, Dec 21 2011 - 12:57 PM
Cadence
Computer Hardware
Design / Functional Verification
Hardware Engineering
Logic Design
austin
hardware design
IP
Verilog
Experienced ASIC RTL designer responsible for architecting and implementing design IP products.
Website:
http://www.cadence.com
Read more
