Over 10 years experience in design and verification at the block and chip level. Extensive work with Verilog, System Verilog, testbenches, Perl, and assembly languages.
Objective
*To obtain a challenging hardware logic design position, which utilizes and increases my current skill set leading to first-pass functional silicon.
JAMES COSTABILE
Senior IC Layout Design Specialist
2402 Hunters Creek Cove, Cedar Park, TX 78613-5906
512-336-8688, mobile 954-815-9350 texas4ever@netscape.com