Wafer Test / Probe
Versital Semiconcuctor engineer and manager with valuable transferable skills
- Device Engineering
- Failure Analysis
- Process / Process Development
- Product / Test Engineering
- Project Management
- Reliability & Quality
- Semiconductors / Fabrication
- Wafer Test / Probe
- Yield Enhancement
- and project management
- Assembly
- Data Analysis
- de-bug
- DOE
- problem solving
- process and product failure analysis
- product test
- qualification
- Semiconductor technologies
- yield improvement
Background information
Over 20 years of semiconductor experience including submicron facility start-ups nationally and internationally.
Over 15 years of direct experience driving product yield improvement.
Availability
Capacity
An Engineering professional in Management of Semiconductor Manufacturing and Products.
- Device Engineering
- Failure Analysis
- Process / Process Development
- Product / Test Engineering
- Project Management
- Semiconductors / Fabrication
- Wafer Test / Probe
- Yield Enhancement
- and leading start-up teams
- Data Analysis
- de-bug
- Detailed knowledge of semiconductor technologies
- DOE
- pre-assembly processing
- problem solving
- process and product failure analysis
- product test
- project management
- qualification
Background information
I have extensive experience in semiconductor manufacturing focused on product engineering and yield enhancement in addition to the product and product management skills outlined in my resume.
Availability
Capacity
Experienced and versital semiconductor engineer and manager
- Device Engineering
- Failure Analysis
- Operations
- Process / Process Development
- Product / Test Engineering
- Project Management
- Reliability & Quality
- Semiconductors / Fabrication
- Wafer Test / Probe
- Yield Enhancement
- Continuing Process Improvement
- Cross-Cultural Team Building
- DOE
- Lean Manufacturing
- Product Evaluation
- project management
Background information
Best Practices. Established a common methodology for the production planning of product introductions. Results: Improved production planning and reduced variations between planning cycles.
Availability
Capacity
Electronic Applications Engineer
- Analog / RF / Circuit Design
- Design / Functional Verification
- Device Engineering
- Failure Analysis
- Industrial
- Layout / Floorplanning
- Library Design / Device Characterization
- Process / Process Development
- Product / Test Engineering
- Reliability & Quality
- Support
- Synthesis & Timing
- Wafer Test / Probe
- Analog
- C++
- Cadence Virtuoso
- Digital
- Matlab
- Protel99SE
- RF and mixed signal
- Semiconductor devices
- SystemC
Background information
+ Strong knowledge of smith chart, transmission line, mixer, oscillator, PLL design and test measurements using ADS and ASITIC.
Availability
Capacity
Research & Development Device Technician
- Design / Functional Verification
- Device Engineering
- Library Design / Device Characterization
- Logic Design
- Process / Process Development
- Product / Test Engineering
- Semiconductors / Fabrication
- Training / Consulting
- Validation / Lab / Debug
- Wafer Test / Probe
- defect array
- design for test
- device isolation
- Electroglas
- Excel
- hci
- HP/Basic
- HP/UX
- Mentor Graphics
- micro probe
- parametric analyser
- Perl
- pico probe
- ring oscillator
- shell scripting
- SOI
- Solaris
- Visual Basic
Background information
Senior Device Technician
Motorola, Advanced Products Research and Development Laboratory, Austin, Texas