Semiconductors / Fabrication
Mixed Signal Designer
- Analog / RF / Circuit Design
- Design / Functional Verification
- Device Engineering
- Hardware Engineering
- Library Design / Device Characterization
- Logic Design
- Process / Process Development
- Semiconductors / Fabrication
- Synthesis & Timing
- Analog Design
- ASIC Design
- Clock Tree/Bus Modeling.
- CMOS Custom Circuit Design
- CMOS Low Power Designs and Methodologies
- Device Physics
- IO
- IR Drop Analysis
- NanoSim/UltraSim
- ROM/SRAM
- Transistor Fundamentals
Background information
Sanjay Patil
11004 Pebble Garden Ln., Austin, TX 78739
Cell: (512) 731-2781/573-1063
sanjay_97@yahoo.com
OBJECTIVE
Seeking Mixed Signal IC Design Position Focused On Low Power.
Availability
Capacity
3 - 5 Year Digital ASIC Designer & Sr. Digital Asic Designer – Austin, TX
IT Manager
Background information
27 years in the Semiconductor Industry
Past 5 years managing AMD's Corporate Data Centers in the U.S.
Availability
Capacity
Research & Development Device Technician
- Design / Functional Verification
- Device Engineering
- Library Design / Device Characterization
- Logic Design
- Process / Process Development
- Product / Test Engineering
- Semiconductors / Fabrication
- Training / Consulting
- Validation / Lab / Debug
- Wafer Test / Probe
- defect array
- design for test
- device isolation
- Electroglas
- Excel
- hci
- HP/Basic
- HP/UX
- Mentor Graphics
- micro probe
- parametric analyser
- Perl
- pico probe
- ring oscillator
- shell scripting
- SOI
- Solaris
- Visual Basic
Background information
Senior Device Technician
Motorola, Advanced Products Research and Development Laboratory, Austin, Texas
Availability
Capacity
power estimation and energy profiling of DSP processors
- Applications / Field
- Architecture / ESL / Modeling
- Design / Functional Verification
- DSP / Algorithms
- Embedded Software Developer
- Failure Analysis
- Hardware Engineering
- Logic Design
- Semiconductors / Fabrication
- Systems Engineer
- Tools / EDA Development
- Validation / Lab / Debug
- architecture
- benchmarking
- C
- DSP
- energy
- energy estimation
- model validation
- modeling
- Perl
- power
- power estimation
Background information
Freescale Semiconductors, India (May 2005 – August 2007)
Development of a power estimation tool and an energy profiler for StarCore VLIW DSP
Availability
Capacity
Modeling and Performance Analysis of Computer Architecture
- Architecture / ESL / Modeling
- Design / Functional Verification
- DSP / Algorithms
- Embedded Software Developer
- Hardware Engineering
- Semiconductors / Fabrication
- Systems Engineer
- Tools / EDA Development
- benchmarking
- compiler flag mining
- cycle accurate simulators
- EEMBC
- modeling
- performance analysis
- SPEC
- trace-driven simulator
Background information
Freescale Semiconductors (May 2005 – August 2007)
Performance Analysis of PowerPC Processors
Availability
Capacity
Strategic Account Manager with strong technical background
Background information
With over 18 years in the high tech equipment industry, I have enjoyed positions including Strategic Account Manager, Sr. Member of Technical Staff, and Engineering Manager.
Specific Skills include:
•Executive-level Relationship Management
•Project/Program Management
•Strong Management Experience and Skills
•Technical Proficiency/Presentation
•Strategic / Spin / Value Selling
•Contract Negotiation
•Sales / Revenue Forecasting
•Strong Statistical Background