VTUNE

Hardware Engineer/ CPU Architecture Designer

AHDL
Altera Quartus
Architecture / ESL / Modeling
C
C++
Design / Functional Verification
DSP / Algorithms
Hardware Engineering
HSPICE
Logic Design
SPEC 2000
Systems Engineer
Tools / EDA Development
Training / Consulting
Verilog
VHDL
VTUNE
Xilinx ISE and EDK

Background information

I am a PhD student and will be graduating this May 2008. I have interest as a hardware engineer. My academic research has focus on advance hardware algorithms for searching.

Availability

Full-time (day)

Capacity

Employee